Loop transformations for interface-based hierarchies IN SDF graphs
| Title | Loop transformations for interface-based hierarchies IN SDF graphs |
| Publication Type | Conference Papers |
| Year of Publication | 2010 |
| Authors | Piat J, Bhattacharyya SS, Raulet M |
| Conference Name | 2010 21st IEEE International Conference on Application-specific Systems Architectures and Processors (ASAP) |
| Date Published | 2010 |
| Keywords | Application software, code generation, Computer architecture, Computer interfaces, Data-Flow programming, Digital signal processing, Loop parallelization, PARALLEL PROCESSING, Power engineering computing, Power system modeling, Processor scheduling, Programming profession, scheduling, SDF graph, system recovery |
| Abstract | Data-flow has proven to be an attractive computation model for programming digital signal processing (DSP) applications. A restricted version of data-flow, termed synchronous data-flow (SDF), offers strong compile-time predictability properties, but has limited expressive power. A new type of hierarchy (Interface-based SDF) has been proposed allowing more expressivity while maintaining its predictability. One of the main problems with this hierarchical SDF model is the lack of trade-off between parallelism and network clustering. This paper presents a systematic method for applying an important class of loop transformation techniques in the context of interface-based SDF semantics. The resulting approach provides novel capabilities for integrating parallelism extraction properties of the targeted loop transformations with the useful modeling, analysis, and code reuse properties provided by SDF. |