High-level synthesis of DSP applications using adaptive negative cycle detection
Title | High-level synthesis of DSP applications using adaptive negative cycle detection |
Publication Type | Journal Articles |
Year of Publication | 2002 |
Authors | Chandrachoodan N, Bhattacharyya SS, Liu KJR |
Journal | EURASIP J. Appl. Signal Process. |
Volume | 2002 |
Issue | 1 |
Pagination | 893 - 907 |
Date Published | 2002/01// |
ISBN Number | 1110-8657 |
Keywords | adaptive performance estimation, dynamic graphs, maximum cycle mean, negative cycle detection |
Abstract | The problem of detecting negative weight cycles in a graph is examined in the context of the dynamic graph structures that arise in the process of high level synthesis (HLS). The concept of adaptive negative cycle detection is introduced, in which a graph changes over time and negative cycle detection needs to be done periodically, but not necessarily after every individual change. We present an algorithm for this problem, based on a novel extension of the well-known Bellman-Ford algorithm that allows us to adapt existing cycle information to the modified graph, and show by experiments that our algorithm significantly outperforms previous incremental approaches for dynamic graphs. In terms of applications, the adaptive technique leads to a very fast implementation of Lawlers algorithm for the computation of the maximum cycle mean (MCM) of a graph, especially for a certain form of sparse graph. Such sparseness often occurs in practical circuits and systems, as demonstrated, for example, by the ISCAS 89/93 benchmarks. The application of the adaptive technique to design-space exploration (synthesis) is also demonstrated by developing automated search techniques for scheduling iterative data-flow graphs. |
URL | http://dl.acm.org/citation.cfm?id=1283100.1283192 |